1. Technical Field
The present invention relates to multiport semiconductor memory devices, and more particularly, to a multiport semiconductor memory device providing a direct access function in a shared structure of nonvolatile memory, and a multiprocessor system employing the same.
2. Discussion of the Related Art
Modern electronic systems, for example mobile communications systems such as portable media players (PMPs), handheld phones and personal digital assistants (PDAs), are increasingly being called upon to handle complex functions. For example, a handled phone may be able to play back encoded music, run video games, take pictures and video, access the Internet, process payments and more. These devices must be able to provide a stable and predictable performance. In order to perform these and other sophisticated functions, the device may include an application processor. The application processor may be in addition to a communication processor that may perform modulation/demodulation functionality central to the ability of the device to communicate with the wireless network. The application processor and the communication processor may coexist on a single printed circuit board (PCB) within the mobile device.
In such mobile systems, a semiconductor memory may be used to store data for use by both the communication processor and the application processor. Accordingly, the memory may include a plurality of access ports so that the memory may be simultaneously read from and written to by various processes executed on both the communication processor and the application processor.
In general, a semiconductor memory device having two access ports is called a dual-port memory. A typical dual-port memory has been well known in the field as an image processing video memory having a RAM port accessible in a random sequence and a SAM port accessible only in a serial sequence. Unlike the configuration of the video memory mentioned above, a dynamic random access memory (DRAM) does not employ a SAM port. The DRAM may have a shared memory area that is accessible by respective processors through a plurality of access ports. Such a DRAM is known as a multiport semiconductor memory device or multipath accessible semiconductor memory device.
An example of a shared memory area of a DRAM is shown in FIG. 1. United States Patent application publication No. US 2003/0093628, (“Matter et. al.”), which is hereby incorporated by reference, includes a description of such a shared memory area and describes memory adequate to such multiprocessor system.
FIG. 1 illustrates a block diagram of a multiprocessor system according to the conventional art. A memory array 35 is constructed of first, second and third portions 33, 31, and 32. In the multiprocessor system 50, the first portion 33 of the memory array 35 is accessed only by a first processor 81 through a first port 37, and the second portion 31 is accessed only by a second processor 80 through a second port 38, and the third portion 32 is accessed by both the first and second processors 70 and 80. The size of the first and second portions 33 and 31 of the memory array 35 may be changed depending upon an operation load of the first and second processors 70 and 80, and the type of memory array 35. The memory array 35 shown herein is a memory type or disk storage type memory array.
Accordingly, in techniques of the conventional art, it may not be possible for each of the processors to directly access each of the portions of the memory array.